design vt. 1.計劃,企圖,立意要…。 2.指定,預(yù)定;留給,留著。 3.設(shè)計,草擬,擬定,籌劃;起草,畫草圖,打(圖)樣。 design an attack 計劃進(jìn)攻。 design one's son for [to be] a soldier 立意要兒子做軍人。 design a room for one's library 指定一間屋子做某人書房。 vi. 計劃;打樣,打圖樣 (for)。 n. 1.計劃;企圖;目的,意圖,野心,陰謀。 2.(小說等的)提綱,結(jié)構(gòu),構(gòu)想,情節(jié)。 3.設(shè)計,圖案,圖樣。 by design and not by accident 是故意不是偶然。 have a design on 對…有野心,企圖。 have designs upon [against] sb.'s life 擬加害某人。
The number of testhi inputs implemented is processor design - specific Testhi執(zhí)行輸入數(shù)是處理器的專門設(shè)計。
Fft processor design based on fpga 處理器的設(shè)計
Technique of attribute weights extraction in application specific instruction set processor design 評估指標(biāo)權(quán)重抽取技術(shù)
Casio ' s core competences are in miniaturization , micro - processor design , material science and ultra - thin precision casings 卡西歐的核心能力是在小型化技術(shù)、微處理器設(shè)計、材料科學(xué)和極薄的精確模具。
This processor core is of small area and very low power and can be used in programmable baseband processor design 經(jīng)實際流片測試,該處理器核具有面積小、功耗低的特點,可用于多模無線通信基帶處理器的設(shè)計。
This section contains documentation on the processor design that is used in the course , as well as an overview of the c programming language , which is also used in the assignments 這個網(wǎng)頁包含了一些本課程中使用的處理器設(shè)計相關(guān)文件,同時也包含了一個作業(yè)中用得上的c程式語言概論。
3 diefendorff k , dubey p . how multimedia workloads will change processor design . ieee computer , sept . 1997 , 30 : 43 - 45 . 4 wan m , zhang h , george v et al 解決這種靈活性和自適應(yīng)性要求的一個方法是使用通用處理器general purpose processor ,簡稱gpp或數(shù)字信號處理器digital signal processor ,簡稱dsp 。
The staged word processor designed for educational use with nine different faces to suit curriculum requirements . stage menu selector allows features to be enabled progressively 它與圖功能一起為了檢查的一段時間,物體,畫,欄和表包括選擇。外語字典和用言語表達(dá)完成也被支持。程序能夠開放和改變最流行的字處理器和網(wǎng)文件格式化。
The results of verification indicate that the ip protocol processor designed in this paper possesses the essential functions of ip protocol such as fragmenting , reassembly , routing and etc . and can process network data at the line - speed of 320mbit / s 驗證結(jié)果表明,本文設(shè)計的ip協(xié)議處理器具備分片、重組、路由等ip協(xié)議的基本功能,并能以320mbit / s的線速度對網(wǎng)絡(luò)數(shù)據(jù)進(jìn)行協(xié)議處理。
On the other hand , the progressing of processors is bringing much trouble to the processor ' s functional verification , which nowadays consuming more than 70 % of processor design ' s workload and resources , and there is no indication the percentage stops uprising 隨著嵌入式處理器的不斷發(fā)展,整個嵌入式處理器驗證工作的難度則隨之不斷加大,幾乎占到了70 80的工作量和資源,而且還有上升的趨勢。